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EC 3353 Electronic Devices and Circuits question paper, November/December 2024

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Question Paper Code : 40980

B.E./B.Tech. DEGREE EXAMINATIONS, NOVEMBER/DECEMBER 2024.

Third Semester

Electronics and Communication Engineering

EC 3353 — ELECTRONIC DEVICES AND CIRCUITS

(Common to : Electronics and Telecommunication Engineering)

(Regulations 2021)

Time : Three hoursMaximum : 100 marks

Answer ALL questions.

PART A — (10 × 2 = 20 marks)

  1. 1.

    Write the voltage current equation of PN junction diode.

  2. 2.

    Draw the circuit of half wave rectifier.

  3. 3.

    What is an operating point in an amplifier design?

  4. 4.

    Why gain of an amplifier reduces at high frequencies?

  5. 5.

    What is common mode gain?

  6. 6.

    Differentiate single and double tuned amplifier.

  7. 7.

    Define Barkhausen criterion for oscillations.

  8. 8.

    List the advantages of negative feedback.

  9. 9.

    Compare Class A and Class B power amplifier.

  10. 10.

    List the three basic types of DC/DC Converter.

PART B — (5 × 13 = 65 marks)

  1. 11.
    (a)

    Explain the working of bridge type full of rectifier with neat sinusoidal waveform at the input and sketch the output waveform. Determine the Vdc and PIV.

  2. Or
  3. (b)

    Explain the following characteristics of a silicon BJT transistor in the common emitter configuration.

    • (i)Collector characteristics(7)
    • (ii)Base characteristics(6)
  4. 12.
    (a)

    Derive the voltage gain, input impedance and output impedance for the small signal model of CE Voltage divider configuration. Also mention the phase relation between the input and output.

  5. Or
  6. (b)

    Derive the voltage gain, input impedance and output impedance for the small signal model of E MOSFET CS - Voltage divider configuration.

  7. 13.
    (a)

    For the network of Fig. 1 [Fig. 1: n-channel JFET amplifier. Source Vs with 1 kohm series resistor coupled through 0.1 microF to the gate (V1, input impedance Zi); 1 Mohm from gate to ground; drain to 18 V through 3 kohm; drain coupled through 4.7 microF to output Vo across a 3.9 kohm load; source to ground through 1.2 kohm bypassed by 10 microF. IDSS = 6 mA, Vp = -6 V, rd = infinity ohm. CWi = 3 pF, CWo = 5 pF, Cgd = 4 pF, Cgs = 6 pF, Cds = 1 pF.]

    • (i)Determine gm0 and gm.(4)
    • (ii)Find Av and Avs in the mid-frequency range.(3)
    • (iii)Determine fHi and fHo.(3)
    • (iv)What is the gain-bandwidth product of the amplifier?(3)
  8. Or
  9. (b)

    For the cascode amplifier of Fig. 2. [Fig. 2: BJT cascode amplifier, VCC = 22 V. Bias divider RB1 = 8.2 kohm, RB2 = 4.7 kohm, RB3 = 3.3 kohm from VCC to ground; base of Q2 (beta2 = 120) at the RB1-RB2 junction, bypassed to ground by C1 = 10 microF; base of Q1 (beta1 = 60) at the RB2-RB3 junction, input Vi through Cs = 5 microF. Q2 collector to VCC through RC = 2.2 kohm, output Vo through C = 5 microF; Q2 emitter to Q1 collector; Q1 emitter to ground through RE = 1.1 kohm bypassed by CE = 20 microF.] Determine

    • (i)The base and collector currents of each transistor.
    • (ii)The voltages VB1, VB2, VE1, VC1, VE2 and VC2.
  10. 14.
    (a)

    Derive the input impedance, output impedance and voltage gain of voltage series feedback network using forward gain block A and feedback gain block beta.

  11. Or
  12. (b)

    Explain the working of FET Colpitts oscillator. Also derive it frequency of oscillation.

  13. 15.
    (a)

    Explain the working of series fed class A large signal amplifier using a simple fixed bias circuit and derive the maximum efficiency.

  14. Or
  15. (b)

    With suitable circuit diagram, elucidate the working of Buck Boost Converter.

PART C — (1 × 15 = 15 marks)

  1. 16.
    (a)

    [Fig. 3: 20 V source feeding series resistor RC = 220 ohm (current IR) into a Zener diode (VZ = 10 V, PZmax = 400 mW, current IZ) in parallel with load RL (current IL, voltage VL).]

    • (i)Determine VL, IL, Iz and IR for the network in Fig 3 of if RL = 180 ohm.(5)
    • (ii)Determine VL, IL, Iz and IR for the network of if RL = 470 ohm.(5)
    • (iii)Determine the value of RL that will establish maximum power conditions for the Zener diode.(3)
    • (iv)Determine the minimum value of RL to ensure that the Zener diode is in the "on" state.(2)
  2. Or
  3. (b)

    A buck boost converter operating at 20 kHz is shown in Fig. 4. The Output capacitor C is sufficiently large to ensure a ripple-free output voltage. The input voltage Vin is 15 V. The converter is supplying a load of 10 W. If the output voltage is required to be 10 V, find the duty ratio (D) of the switch. [Fig. 4: buck-boost converter: 15 V source, switch S, 50 microH inductor to ground, diode D, 390 microF output capacitor in parallel with load R across which the output is 10 V (inverted polarity).]

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