Skip to content
SmartFigureEdu

EC 3352 Digital Systems Design question paper, November/December 2022

Download PDFRepeated questions and unit-wise bank

Question Paper Code : 70085

B.E./B.Tech. DEGREE EXAMINATIONS, NOVEMBER/DECEMBER 2022.

Third Semester

Electronics and Communication Engineering

EC 3352 — DIGITAL SYSTEMS DESIGN

(Common to : Electronics and Telecommunication Engineering)

(Regulations 2021)

Time : Three hoursMaximum : 100 marks

Answer ALL questions.

PART A — (10 × 2 = 20 marks)

  1. 1.

    Find the octal equivalent for the given decimal number (149)10.

  2. 2.

    Simplify the Boolean function xy + x'z + yz to a minimum number of literals.

  3. 3.

    What is meant by combinational circuits? Give examples.

  4. 4.

    What is a parity bit?

  5. 5.

    Find the minimum number of flip flops required to build a modulo N counter.

  6. 6.

    Draw the master slave configuration using D-flip flop.

  7. 7.

    Differentiate between critical and non-critical race in asynchronous sequential circuits.

  8. 8.

    What is meant by fundamental mode sequential circuit?

  9. 9.

    Define fan in and fan out of a gate?

  10. 10.

    Write the difference between EPROM and EEPROM.

PART B — (5 × 13 = 65 marks)

  1. 11.
    (a)
    • (i)Simplify the four variable boolean function F(A,B,C,D) = Sum(0,2,3,5,7,8,9,10,11,13,15) and find the prime implicants and essential prime implicants.(8)
    • (ii)Express the Boolean function F = xy + x'z as a product of maxterms.(5)
  2. Or
  3. (b)

    Minimize the expression Y(A,B,C,D) = Sum m(0,1,3,7,8,9,11,15) using tabulation method.

  4. 12.
    (a)
    • (i)Explain the working of 3-bit even parity generator and checker.(7)
    • (ii)Illustrate the operation of priority encoder.(6)
  5. Or
  6. (b)
    • (i)Design a full adder and implement in sum-of-product form.(7)
    • (ii)Construct the 4 x 16 decoder with two 3 x 8 decoders.(6)
  7. 13.
    (a)

    Elucidate the analysis and design of clocked sequential circuits with a suitable example.

  8. Or
  9. (b)

    List out the capabilities of a universal shift register. Illustrate the four bit universal shift register with a function table and explain its working.

  10. 14.
    (a)

    Mention the types of hazard that occur in combinational circuits? Demonstrate the occurrence of static 0-hazard with a suitable example and find the solution to fix the static hazard in combinational circuits.

  11. Or
  12. (b)

    Taking relevant examples, explain the various types of races that occur in sequential circuits. Also briefly explain about the race free state assignment.

  13. 15.
    (a)

    Design the following sum-of-minterms using PAL. W(A,B,C,D) = Sum(2, 12, 13); X(A,B,C,D) = Sum(7,8,9,10,11,12,13,14,15); Y(A,B,C,D) = Sum(0,2,3,4,5,6,7,8,10,11,15); Z(A,B,C,D) = Sum(1,2,8,12,13)

  14. Or
  15. (b)
    • (i)Draw and explain the totempole TTL output configuration.(6)
    • (ii)Compare the characteristics of RTL, TTL, ECL and CMOS logic families.(7)

PART C — (1 × 15 = 15 marks)

  1. 16.
    (a)

    Design a counter using JK flip flops with the following binary sequence: 1, 2, 5, 7 and repeat.

  2. Or
  3. (b)

    Design the binary to gray code converter and draw the simplified logic diagram in sum-of-product form.

Other EC3352 papers